NAND Flash Power Loss Protection (PLP)

What is Power Loss Protection (PLP)?

Power Loss Protection (PLP) technology safeguards the data integrity of solid-state drives (SSDs) equipped with a DRAM cache during unexpected power outages. Utilizing capacitors, PLP extends the duration available to transfer data from the DRAM cache to the SSD's permanent flash memory. 

Firmware-based PLP is engineered to mitigate data loss risks by enabling the firmware to reconstruct the mapping table during the next power-on sequence after a power loss event.  

In NAND flash products, the mapping table is a crucial data structure used by the NAND flash controller to keep track of the physical location of data stored in the NAND flash memory chips. It acts as a translation mechanism between the logical addresses provided by the host system (such as Logical Block Addresses or LBAs) and the physical locations of the data within the NAND flash memory. The firmware of the controller ensures an update of this mapping table whenever data is written or shuffled in the NAND flash. This operation is crucial for the firmware to locate the latest location of the data when the device is turned off and on again. All the newly written data is accompanied by tags or spare bytes containing essential information such as Logical Block Address (LBA), Error Correction Codes (EEC), and other structural data. 

The NAND flash firmware employs GPIO (General Purpose Input/Output) Pin monitoring to identify power drop occurrences. Upon detection, the firmware triggers a suspension of internal SSD processes which include functions like garbage collection and wear leveling. This interruption aims to prevent potential data corruption. Following this, a rapid process initiates where cached user data, and the firmware mapping table are swiftly transferred to an allocated temporary block designated for emergency data backup within the NAND flash. 

Upon subsequent power-up, the NAND flash product undergoes a sequence wherein it retrieves the previously flushed data from the emergency backup block during the initial boot phase. This data is then restructured and relocated to a dynamically assigned block within the NAND flash, ensuring proper and secure storage for normal operations. 

Experimental setup: 

An OakGate testing system is used for validating the power-loss protection feature with the objective of guaranteeing that the retrieved data functions fully work after a power-loss event. This in-depth testing approach ensures IM SSDs operate reliably in industrial and embedded applications that may involve sudden power interruptions. 

In the experimental observations, the IM NAND flash products observed a maximum hold up time of around 25ms. It is very necessary to understand that the hold time varies with drive configurations and not on NAND flash itself. 

A comparison between hold up time with and without FW power loss protection. 


Firmware PLP protection stands out as a robust measure taken to avoid data loss, particularly in enterprise storage applications.
For instance: 

  • In RAID setups, where NAND flash products work collectively, the ability to recover data after a power failure is pivotal. This ensures the integrity of the RAID array, preventing potential data loss resulting from one or more failed array members causing the array to go offline. 

  • In scenarios where NAND flash products are part of a shared pool of storage serving multiple hosts and segmented into various Logical Unit Numbers (LUNs), maintaining high availability is critical. Firmware-based PFAIL (Power Fail) protection guarantees the successful recovery of NAND flash products servicing these LUNs and hosts, assuring uninterrupted operation and data integrity. 

Written by Anil Burra.

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